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    政大機構典藏 > 商學院 > 資訊管理學系 > 期刊論文 >  Item 140.119/122102
    Please use this identifier to cite or link to this item: https://nccur.lib.nccu.edu.tw/handle/140.119/122102


    Title: On GPU Implementation of the Island Model Genetic Algorithm for Solving the Unequal Area Facility Layout Problem
    Authors: 周平
    Chou, Ping
    Sun, Xue;Lai, Lien-Fu;Chou, Ping;Chen, Liang-Rui;Wu, Chao-Chin
    Contributors: 資管碩二
    Keywords: unequal area facility layout problem;parallel computing;island model;genetic algorithm;GPU
    Date: 2018-09
    Issue Date: 2019-01-23 12:08:00 (UTC+8)
    Abstract: Facility layout problem (FLP) is one of the hottest research areas in industrial engineering. A good facility layout can achieve efficient production management, improve production efficiency, and create high economic values. Because FLP is an NP-hard problem, meaning it is impossible to find the optimal solution when problem becomes sufficiently large, various evolutionary algorithms (EAs) have been proposed to find a sub-optimal solution within a reasonable time interval. Recently, a genetic algorithm (GA) was proposed for unequal area FLP (UA-FLP), where the areas of facilities are not identical. More precisely, the GA is an island model based, which is called IMGA. Since EAs are still very time consuming, many efforts have been devoted to how to parallelize various EAs including IMGA. In recent work, Steffen and Dietmar proposed how to parallelize island models of EAs. However, their parallelization approaches are preliminary because they focused mainly on comparing the performances between different parallel architectures. In addition, they used one mathematical function to model the problem. To further investigate on how to parallelize the IMGA by GPU, in this paper we propose multiple parallel algorithms, for each individual step in the IMGA when solving the industrial engineering problem, UA-FLP, and conduct experiments to compare their performances. After integrating better algorithms for all steps into the IMGA, our GPU implementation outperforms the CPU counterpart and the best speedup can be as high as 84.
    Relation: Applied Sciences, Vol.8, No.9, pp.1604
    Data Type: article
    DOI 連結: http://dx.doi.org/10.3390/app8091604
    DOI: 10.3390/app8091604
    Appears in Collections:[資訊管理學系] 期刊論文

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